tag:blogger.com,1999:blog-3971202189709462152.post633249729751034512..comments2024-03-11T12:50:02.036+01:00Comments on PyPy Status Blog: Rewrites of the STM core model -- againCarl Friedrich Bolz-Tereickhttp://www.blogger.com/profile/00518922641059511014noreply@blogger.comBlogger6125tag:blogger.com,1999:blog-3971202189709462152.post-78465354717965895322014-02-21T09:04:20.310+01:002014-02-21T09:04:20.310+01:00just 15% slower sounds wonderful!just 15% slower sounds wonderful!Arne Babenhauserheidehttp://draketo.denoreply@blogger.comtag:blogger.com,1999:blog-3971202189709462152.post-72693693823936966672014-02-11T14:39:02.738+01:002014-02-11T14:39:02.738+01:00@Dina: Thanks for the feedback! Note that "%g...@Dina: Thanks for the feedback! Note that "%gs" is a special register that is usually not used: there is no direct way to read/write its actual value. It needs to be done with a syscall, at least before very recent CPUs. It can only be used in addressing instructions as an additional offset.Armin Rigohttps://www.blogger.com/profile/06300515270104686574noreply@blogger.comtag:blogger.com,1999:blog-3971202189709462152.post-29997883406163773872014-02-11T14:32:36.380+01:002014-02-11T14:32:36.380+01:00poll response: I've heard of remap_file_pages!...poll response: I've heard of remap_file_pages! :)<br /><br />I was wondering how to use this call when I learnt of it, but couldn't figure anything out except possibly database applications (similar) and sort algorithms (too limited). I think this call may be used when manipulating framebuffer too, there was something about having multiple mappings [to hardware] some readonly, some not.<br /><br />I would like to [possibly] disagree with your statement in c7 README "Most probably, this comes with no overhead once the change is done..."<br /><br />TLB cache is a limited resource and may easily be contended on large systems. Regular mmap could [in theory] use huge TLB pages, remapped individual pages cannot.<br /><br />In addition there is a small penalty during first access to the remapped page, though you may consider it amortized depending on remap/reuse ratio.<br /><br />Granted it's still small stuff.<br /><br />Reserving one register is is a cool trick, and I find quite acceptable. It too has a small penalty, but the benefits surely outweigh those!Dima Tisnekhttps://www.blogger.com/profile/02596502493502644800noreply@blogger.comtag:blogger.com,1999:blog-3971202189709462152.post-78384586411459055142014-02-10T21:22:51.526+01:002014-02-10T21:22:51.526+01:00More comments on Hacker News.More comments <a href="https://news.ycombinator.com/item?id=7211469" rel="nofollow">on Hacker News</a>.Armin Rigohttps://www.blogger.com/profile/06300515270104686574noreply@blogger.comtag:blogger.com,1999:blog-3971202189709462152.post-58911855094799838642014-02-10T21:22:32.355+01:002014-02-10T21:22:32.355+01:00Statis is not really applicable here: it's a T...Statis is not really applicable here: it's a Transactional Storage system, which despite the attempt of this paper to generalize it, is not going to apply successfully in the context of PyPy.Armin Rigohttps://www.blogger.com/profile/06300515270104686574noreply@blogger.comtag:blogger.com,1999:blog-3971202189709462152.post-74924704470967976352014-02-10T18:29:53.117+01:002014-02-10T18:29:53.117+01:00Did you consider existing STM libraries in your im...Did you consider existing STM libraries in your implementation? It might be worthwhile to take a look at stasis (https://code.google.com/p/stasis/) which has a pretty complete set of features.<br /><br />http://www.eecs.berkeley.edu/Pubs/TechRpts/2010/EECS-2010-2.pdfAnonymousnoreply@blogger.com